Hot Chips 2026: CUDA Targets RISC-V – By Chester Lam

CUDA is Nvidia's dominant GPU compute platform, widely used for machine learning and HPC. Currently supporting x86-64 and aarch64 CPUs, Nvidia now aims to bring CUDA to RISC-V, opening the door for RISC-V CPUs to drive GPU compute. In a Hot Chips 2026 talk, Nvidia detailed the requirements RISC-V CPUs must satisfy to work with CUDA, essentially demanding a server-grade CPU and platform.

Nvidia starts with a requirement for RVA23 CPU compliance and adherence to RISC-V's server SoC and server platform specifications, which cover RAS (reliability, availability, and serviceability), a specialized security processor, and other baseline features. Beyond these, Nvidia adds extra requirements because they found it hard to make CUDA software work well without them. They explicitly want to avoid a 'lowest common denominator' problem where performance-enhancing extensions cannot be used due to lack of guaranteed support, which would force inefficient code. Vector extensions with predication support were cited as an example for eliminating branches.

ACPI is a more difficult requirement. ACPI allows software to discover hardware capabilities and manage power, performance, and thermal behavior. Nvidia's software team was initially unhappy because RISC-V hardware lacked ACPI during early porting work, but this was resolved when the UEFI forum added RISC-V ACPI support in 2025, and the RISC-V BRS (Boot and Runtime Services) specification, which includes ACPI, was ratified last year. Nvidia also requires PCIe coherency to avoid memory ordering problems where DMA engines might read stale data from DRAM while modified data sits in CPU caches, and software would otherwise need explicit cache invalidations. Nvidia considers PCIe coherency standard in server CPUs; the RISC-V server SoC specification recommends it, but Nvidia wants a guarantee. Additionally, Nvidia requires hardware support for peer-to-peer PCIe communication, so buffers copied between devices don't have to route through CPU memory, which would add performance penalties and synchronization complexity.

Nvidia acknowledged that not all requirements were covered in detail, noting they are targeting a certain performance level. Overall, this signals that RISC-V CPUs entering the CUDA ecosystem will need to meet enterprise-grade expectations, potentially shaping RISC-V server hardware development.